ASIC Design of Reversible Multiplier Using Adiabatic Technique

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  • Create Date 29 July, 2025
  • Last Updated 30 July, 2025

Authors : Minal  Gholpe,Asst. Prof. P R. Sangare

Abstract- From past fewdecades,VLSI technologyhas been growing to the large extent. All credit for this goes to the increasing usage of integrated circuits for every embeddedsystem, mobile technologies, computing systems, etc.  Growth and use of technology has increased the thirst for low energy or power consumption. An Adiabatic approach is perfectsolution for the designing of power and energy efficient designs.The word ‘Adiabatic’ is the change of state that occurs without the loss or gain of heat. Reversible computing performed on Toffoli gate having adiabatic design techniques promises more reduced in power consumption as compared to traditional adiabatic CMOS circuits. Tanner EDA tool is used for designing the schematic and analysis. S-EDIT is used to design the schematic and T-SPICE is used to Simulateand check the results of Power Dissipation. W-EDIT is used to display the simulation results in the form of waveform.