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An Implicit Multidimensional Parity based Data Coding and Decoding Algorithms with FPGA Implementation in Communication Systems

An Implicit Multidimensional Parity based Data Coding and Decoding Algorithms with FPGA Implementation in Communication Systems Mr. Vijay Santosh Tawar, Mr. Machchhindra Jibhau Garde DOI : 10.46335/IJIES.2023.8.3.10 Abstract –The usability and use of devices in wireless communication is increasing gradually. The mobility and security of the system and the data integrity in the communication process […]

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FPGA Based SDR For DPLL Application

Authors : Nikita Katole Abstract—To design and developa system on chip reconfigurable modulesField Programmable Gate Array (FPGA) provides a way withhigh performance. In this paper, FPGA architectureis proposed, which would be a starting point for developingan efficient Software Defined Radio (SDR) architecture forrecovering audio signals from digitally modulated frequencywave. At themodulator and demodulator sections, a Digital […]

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